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Freescale Semiconductor /MK61F15WS /DDR /CR06

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Interpret as CR06

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TMOD0TRASMAX0 (0)INTWBR 0RESERVED

INTWBR=0

Description

DDR Control Register 6

Fields

TMOD

Time Mode
TRASMAX

Time Row Access Maximum
INTWBR

Interrupt Write Burst

0 (0): Read commands cannot interrupt write commands

1 (1): Read commands can interrupt write commands
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data